Masters: ARM atomic operations

Jon Masters has put together a
summary of how atomic operations work
on the ARM architecture for those
who are not afraid of the grungy details. "To provide for atomic
access to a given memory location, ARM processors implement a reservation
engine model. A given memory location is first loaded using a special 'load
exclusive' instruction that has the side-effect of setting up a reservation
against that given address in the CPU-local reservation engine. When the
modified value it is later written back into memory, using the
corresponding 'store exclusive' processor instruction, the reservation
engine verifies that it has an outstanding reservation against that given
address, and furthermore confirms that no external agents have interfered
with the memory commit. A register returns success or failure."